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hongted avatar hongted commented on June 18, 2024

Note that peek() is generally requested to implement arbiters without the need for additional state within the block (or when the outside world uses a pop() as a signal that the arbiter chose a particular candidate).

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ericastor avatar ericastor commented on June 18, 2024

For example:

(token, data, valid) = peek(token, ch0);
(token, data0) = recv(token, ch0);

In hardware, the behavior depends on how peek and recv are scheduled. Let's say that they are scheduled in the same cycle. In this case, once the recv occurs, valid will be true and data will be equal to data0.

In an interpreter, one possible sequence of events is that the channel is empty, and peek executes --> data = 0 and valid = 0. The interpreter then blocks on recv. Once there is data on the channel, recv executes and returns data0.

I'm not quite sure this is fully accurate as written, and I don't believe it's necessarily a problem.

One way to think about this is that in both cases, it depends on scheduling. If the peek is before or at the same time as the recv, then we get one result (valid && (data == data0)), but if it's after, we get (!valid && data = 0).

Currently, the DSLX interpreter, proc IR interpreter, and proc IR JIT don't ever simulate operations as happening simultaneously, so given the token edge, we can only get the ordering peek before recv, whereas in HW we could get either peek before recv or peek & recv in the same stage... so the HW realization allows strictly more execution orders than the interpreter.

This is to be expected, since the interpreter serializes things, and is why logic that involves non-KPN operations can't be fully covered by simulations that don't take scheduling into account. FWIW, we also don't stress-test the results of changing execution order, so the interpreter doesn't even maximize the possible coverage for this scenario within these bounds.

So - I'm not sure we shouldn't just go ahead and implement peek()? It won't add any new inaccuracies to the interpreter, as it would only continue the pattern we already have... and I'm pretty sure it's impossible to avoid at least some of those inaccuracies before scheduling.

On the other hand, the proposed peek_and_recv_conditional block expression does have the advantage of being easier to use correctly, at the cost of being more complex to use at all (think poll(2) vs. fgetc + fungetc).

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meheff avatar meheff commented on June 18, 2024

I agree with @ericastor that matching interpreter and hardware behavior generally for latency sensitive operations is really hard to do if not impossible and shouldn't stop us from implementing a generally useful operation like peek. I can see more complex operations being useful as well like the proposed peek_and_recv_condional and maybe something like channel select (see https://gobyexample.com/select). However we should probably still support the basic underlying peek primitive.

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