Name: Francesco Conti
Type: User
Company: @pulp-platform : University of Bologna
Bio: Tenure-Track Assistant Professor at the University of Bologna (Italy), focusing on Deep Learning on Low-Power Heterogeneous Multi-Core SoC's
Twitter: arunax
Location: Bologna
Blog: https://www.unibo.it/sitoweb/f.conti/en
Francesco Conti's Projects
Box64 - Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices
Port face-following capabilities to the PULP-shield, and run it on the Crazyflie 2.0
Simple parser for extracting VHDL documentation
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
A simple testbench for ibex for educational purposes (forked from hwpe-tb)
NEural Minimizer for pytOrch
Helper repository for NEMO examples
A Plug-and-play Lightweight tool for the Inference Optimization of Deep Neural networks
This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.
The multi-core cluster of a PULP system.
This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.
Proper implementation of ResNet-s for CIFAR10/100 in pytorch that matches description of the original paper.
RISC-V Cores, SoC platforms and SoCs
A simple example of SPI communication between two Nucleo STM32F401RE, making leds link in counterphase.
HDL symbol generator
This repository containts the pytorch scripts to train mixed-precision networks for microcontroller deployment, based on the memory contraints of the target device.