dimilaprog Goto Github PK
Type: User
dimilaprog's Projects
3-bit-alu-with-overflow-bit
3 Bit Arithmetic Logic Unit(ALU) with Overflow Bit ,implemented with DSCH 3.5, Microwind and Verilog.
affiliate_ai
Program to Create affiliate ads
avr-sensor-alarm-with-lock
AVR ATMEGA 16 CO sensor system that collects CO values translated into Voltage, converts it via internal ADC and displays the danger level on LCD and LEDs. There is also a lock system that is managed by keyboard password.
continuous-pipeline-ripple-carry-multiplier-in-vhdl
Continuous Pipeline Ripple Carry Multiplier in VHDL using Vivado Xilinx
cryptodev-linux-paravirtualization-with-server-client-application
Hardware Accelerated Cryptography through Cryptodev Module used in Client-Server Communication. Implementation also done in GUEST OS userspace using VIRTIO-QEMU-KVM and Split-Driver to use HOST hardware.
custom-arm-os
Simple ARM Operating System for the Raspberry Pi, supporting Aarch64 architecture.
fall-detection-system
IOT system for fall detection.
parallel-8-tap-fir-filter-vhdl
2 INPUT/OUTPUT Parallel 8 Tap FIR Filter written in VHDL , compiled, simulated and synthesized using Xilinx Vivado.
prototype-ir-signal-receiver-and-decoder
Discrete electronics receiver, amplifier, decoder on PCB
risc-v-assembly-using-rcc
RISC-V assembly programs written on digilent nexys a7 using the RISC-V Calling Convention for calling and jumping between routines.
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