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cnvogelg avatar cnvogelg commented on June 15, 2024

The error message denotes that the return value received is not convertible to (does not fit into) an integer that is required for a register write.
Make sure to val & 0xffffffff the value.
Multiple return values can be returned by giving a list, see UDivMod32 in the same lib as a reference

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cahirwpz avatar cahirwpz commented on June 15, 2024

As you can see below SDivMod32 is roughly the same as UDivMod32. I'd expect it to work, but it crashes... any clues?

  def SDivMod32(self, ctx):
    dividend = ctx.cpu.r_reg(REG_D0)
    divisor = ctx.cpu.r_reg(REG_D1)
    quot = dividend / divisor
    rem  = dividend % divisor
    log_utility.info("SDivMod32(dividend=%d, divisor=%d) => (quotient=%d, remainder=%d)" % (dividend, divisor, quot, rem))
    return [quot, rem]

  def UDivMod32(self, ctx):
    dividend = ctx.cpu.r_reg(REG_D0)
    divisor = ctx.cpu.r_reg(REG_D1)
    quot = dividend / divisor
    rem  = dividend % divisor
    log_utility.info("UDivMod32(dividend=%u, divisor=%u) => (quotient=%u, remainder=%u)" % (dividend, divisor, quot, rem))
    return [quot, rem]

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cnvogelg avatar cnvogelg commented on June 15, 2024

ah I see... multi reg return was broken if trace is enabled. Is fixed now in 5304616.
Also added a UDivMod32 unit test.

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