[DBG_X] Compilation failures in L1Trigger/L1TMuonOverlapPhase2 about cmssw

[iarspider]

assign l1,core

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New categories assigned: l1,core

@Dr15Jones,@makortel,@epalencia,@aloeliger,@smuzaffar you have been requested to review this Pull request/Issue and eventually sign? Thanks

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A new Issue was created by @iarspider.

@makortel, @smuzaffar, @sextonkennedy, @rappoccio, @antoniovilela, @Dr15Jones can you please review it and eventually sign/assign? Thanks.

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[aloeliger]

@mbluj @kbunkow FYI

[smuzaffar]

I think constexpr should fix the one from cmssw i.e.

undefined reference to `lutNN::LutNeuronLayerFixedPoint<8, 13, 16ul, 5, 11, 9, 5>::input_W'
undefined reference to `lutNN::LutNeuronLayerFixedPoint<8, 13, 16ul, 5, 11, 9, 5>::lut_W'
undefined reference to `lutNN::LutNeuronLayerFixedPoint<8, 13, 16ul, 5, 11, 9, 5>::lutSize'
undefined reference to `lutNN::LutNeuronLayerFixedPoint<8, 13, 16ul, 5, 11, 9, 5>::lutOutSum_I'
undefined reference to `lutNN::LutNeuronLayerFixedPoint<8, 13, 16ul, 5, 11, 9, 5>::lutOutSum_W'
undefined reference to `lutNN::LutNeuronLayerFixedPoint<8, 13, 16ul, 5, 11, 9, 5>::output_W'

and for undefined reference to ap_int_base<5, false>::width'`, I guess we need to patch https://github.com/Xilinx/HLS_arbitrary_Precision_Types/blob/master/include/ap_int_base.h#L125 to have constexpr ?

[mbluj]

It compiles fine with non-DBG IB, explicitly checked with CMSSW_14_1_DBG_X_2024-05-09-2300 and el8_amd64_gcc12. What is difference between regular and DBG releases?
The L1Trigger/L1TMuonOverlapPhase2 package was recently added to CMSSW, could it be that it should be "registered" somewhere (its libraries known to some tools) to be dbg'ed?

[smuzaffar]

DBG IBs are built with -g -O3 -DEDM_ML_DEBUG flags and in this case the code https://github.com/cms-sw/cmssw/blob/master/L1Trigger/L1TMuonOverlapPhase2/interface/LutNeuronLayerFixedPoint.h#L64-L73 gets compiled https://github.com/cms-sw/cmssw/blob/master/FWCore/MessageLogger/interface/MessageLogger.h#L240-L252

[mbluj]

Thank you @smuzaffar
I confirm that usage of constexpr fixes issues within OMTF code, but I think I am not able to fix them in header from AMD.
How to proceed? Should I prepare PR with fixes in OMTF and assuming that other thing will be fixed by someone else?

[makortel]

We already patch the https://github.com/Xilinx/HLS_arbitrary_Precision_Types in cmsdist so in principle we could continue doing that.

Written that, it seems to me the frequency of problems with this package is increasing, and the package (in GitHub) seems practically unmaintained since 5 years, so I'm getting worried about long-term sustainability.

[mbluj]

OK, so I prepare PR with CMSSW fixes.
What concerns the external package I cannot comment, but at least from a quick look it is still recommended by Xylinx/AMD in HLS documentation...

[dan131riley]

Written that, it seems to me the frequency of problems with this package is increasing, and the package (in GitHub) seems practically unmaintained since 5 years, so I'm getting worried about long-term sustainability.

I diffed against Vitis_HLS 2022.2 and it looks like there's only a handful of changes that are directly relevant to us (most of the changes don't apply to the Apache licensed version), and most of them look to be constexpr-related. These are sufficiently small that I think it would be ok to cherry pick those for the CMS version and make a PR to the Xilinx repo.

[makortel]

We have had one PR (Xilinx/HLS_arbitrary_Precision_Types#1) sitting there for ~6 months without any reaction.

[smuzaffar]

#44974 and cms-sw/cmsdist#9193 should fix the DBG link errors

[smuzaffar]

I agree with @makortel, https://github.com/Xilinx/HLS_arbitrary_Precision_Types looks unmaintained. No updates in last 5 years and even the PR I opened to initialize the memory is open since NOV last year