bruceer Goto Github PK

amba_apb_sram

AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM and can be used as standalone Verification IP (VIP).

archexp

浙江大学计算机体系结构课程实验

blog

技术博客

c_learning

Learning C programming

chisel-bootcamp

Generator Bootcamp Material: Learn Chisel the Right Way

colorama

Simple cross-platform colored terminal text in Python

computer-organization

Learning Computer Organization, hardware class.

concfg

Import / export Windows console settings

cortexm0ds

customizablecomputinglab.github.io

dotfile

e200_opensource

The Ultra-Low Power RISC Core

free-programming-books-zh_cn

:books: 免费的计算机编程类中文书籍，欢迎投稿

git-tutorials

Git-Tutorials GIT基本使用教學:memo:

hdl

hw

RTL, Cmodel, and testbench for NVDLA

icgeek

IC

icscript

kindlehelper

全网小说搜索,下载.可自动生成mobi格式小说.

learn-regex-zh

:cn: 翻译: 学习正则表达式的简单方法

learn_python_hard_way

learning-.vimrc

Learn how to config vim/vi, and record my own vimrc

learning-c

This is a Learning repository. The aim is C programming.

learning-makefile

Learning Makefile by Liu Yun

learning-perl

Learning Perl

lec

libpku

北京大学课程资料整理

linux_config

my linux config file

macvim

Vim - the text editor - for Mac OS X

makefile_simulation

ncverilog coes with verdi