Comments (5)
And LLDT, LMSW, VERR, VERW as well.
ref.x86asm.net has one version of these instructions.
www.sandpile.org lists Rv version, but seems sandpile have bugs.
from asmdb.
I think you are right, I just tested it and assemblers generally refuse any form other than r16, I'm not sure why Intel is using r/m16 though - I mean this basically says you should be able to use any register, but only low 16-bits will be used.
from asmdb.
Intel 32583 document has many errors, bu no correction in errata.
I found not a few ones in my past conversion processing. I will check it out again and will try to merge it into the great asmdb.
from asmdb.
Yeah, but here I'm sure you are right now, I tested several assemblers and none would accept any other reg than r16. I will commit a fix.
from asmdb.
It should be fixed, please reopen if the fix is incorrect
from asmdb.
Related Issues (16)
- Support for jmp, call, and ret [far] instructions HOT 7
- Enough metadata for codegen? HOT 3
- keep consistency for instruction vpbroadcastb W:zmm {kz}, xmm/m8 to xmm[0]/m8 HOT 1
- Instructions missed implicit operands info HOT 4
- xlat and xlatb HOT 1
- armdata.js marks "blx label" as available in ARMv4 HOT 1
- armdata.js marks one of the T32 forms of TST as available in ARMv4T+ HOT 1
- What does 0 and U mean on the flags? HOT 6
- inconsistent naming of implicit x86 operands, e.g. <eax> and "eax" HOT 4
- confusion around x86 "and" instructions HOT 8
- inconsistent use of immediate operand placeholders HOT 5
- call vs jmp format inconsistency HOT 1
- suggestions for making the format field ("M", "RM", "MR", etc) more useful
- suggestion for movss and movsd and possibly other similar case HOT 3
- possible typo in movq (and maybe movd is as well) HOT 2
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from asmdb.