Number of ADC channels arbitrarily limited about arduino_advancedanalog

[iabdalkader]

Sorry for taking so long to reply to this issue, I haven't been watching the repo for a while as I thought it was maintained by someone else. Re your issue, I can't remember exactly why I limited the channels to that specific number, it's probably because we only broke out a few ADC channels, this was before the GIGA. Can you point out where in the datasheet it mentions the maximum number of channels that can be sampled successively ? If they are indeed 16, there's no reason not increase them.

[tfry-git]

Pinpointing the documentation is complicated by the fact that STM provides separate huge documents for each processor variant within the H7 family. Anyway, for the H747 of the giga that would be ST RM0399 version 4.0, section 26.4.11 (page 970), and the detail descriptions sections 26.6.11 through 26.6.15 on the ADC_SQRx registers.

For determining that this is indeed a common spec of the H7-family, I guess the more accessible reference is the HAL driver: targets/TARGET_STM/TARGET_STM32H7/STM32Cube_FW/STM32H7xx_HAL_Driver/stm32h7xx_ll_adc.h lists 16 ADC_REGULAR_RANK_XY ranks, without any #if for processor variant.

[iabdalkader]

@tfry-git Thanks for the references. I have this on my todo list and will fix it as soon as I can.