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a9gemacs

a9grails

abc

ABC: System for Sequential Logic Synthesis and Formal Verification

aigirl

An Ai Girl Friend with Long Term Memory

alacritty_ligature

A cross-platform, OpenGL terminal emulator.

aliyun-hello

ang-i3config

ang-i3config

ang-spacemacs

angular-starter

:tada: An Angular Starter kit featuring Angular (Router, Http, Forms, Services, Tests, E2E, Dev/Prod, HMR, Async/Lazy Routes, AoT via ngc), Karma, Protractor, Jasmine, Istanbul, TypeScript, TsLint, Codelyzer, Hot Module Replacement, @types, and Webpack by @TipeIO

archinstall

Arch Linux installer - guided, templates etc.

attackwebframeworktools

本软件首先集成危害性较大框架和部分主流cms的rce(无需登录,或者登录绕过执行rce)和反序列化(利用链简单)。上传getshell。sql注入等高危漏洞直接就可以拿权限出数据。其次对一些构造复杂exp漏洞进行检测。傻瓜式导入url即可实现批量测试,能一键getshell检测绝不sql注入或者不是只检测。其中thinkphp 集成所有rce Exp Struts2漏洞集成了shack2 和k8 漏洞利用工具所有Exp并对他们的exp进行优化和修复此工具的所集成漏洞全部是基于平时实战中所得到的经验从而写入到工具里。例如:通达oA一键getshell实战测试 struts2一键getshell 等等

aui

Archlinux Ultimate Install

bist

Low Power BIST based Multiplier Design and Simulation using FPGA

bist-1

Designed and implemented a DFT tool using Verilog to add BIST capabilities to an Arithmetic Unit (CUT). Used ModelSim for designing and simulation of BIST controller, PRPG as Test Pattern Generator, MISR as Output Response Analyzer and AU.Testing was done by infusing faults in a fault-free AU and checking the response

bist-2

Pattern Generation for Logic BIST

bist-design

Done as a part of the coursework, Design For Testing and Testability. Designed and implemented in Verilog to add Built in Self Test (BIST) capabilities to a given combinational logic. The Test Pattern Generator (TPG), Output Response Analyzer (ORA) and BIST controller were designed. A 1-bit full adder was considered as the circuit under test.

bist-implementation

Designed and implemented the DFT tool in Verilog to add BIST capabilities to any given digital circuit. The components Pattern Generator (PG), Response analyzer (RA), and the BIST controller were designed to form a complete BIST circuit. The implementation of BIST circuitry was carried out on an Arithmetic Unit.

bist_ip_core

Development of a SoC for testing an IP Core. The project has been developped in VHDL, using Xilinx ISE and IP Core. In order to test the correct functionalities(simulation in presence of faults and without faults), it has been added a modified module to simulate fault simulation.

chat-example

coursera-computer-programming

計算機程式設計 on Coursera by 劉邦鋒, National Taiwan University

cplusplus-refactor

Code from my C++ refactor book

create-react-app-auth-amplify

Implements a basic authentication flow for signing up/signing in users as well as protected client side routing using AWS Amplify.

design-and-implementation-of-memory-bist-on-an-fpga

Implemented Memory Built in self test (MBIST) in an FPGA.The design consists of a custom memory block and BIST controller which implements march-c algorithm to detect various faults.

devtools-theme-a9groove

dotfiles

A set of vim, zsh, git, and tmux configuration files.

drag

draggd

drogon

Drogon: A C++14/17/20 based HTTP web application framework running on Linux/macOS/Unix/Windows

ece_6443_mbist

Apr 2021 / no dedicated counter or comparator

ece_6463_processor

Dec 2020 / MIPS / with unsigned divider